SECTION IV-2: ADDLW Instruction and the Status Register

Here we will examine the impact of the ADDLW instruction on the flag bits C, DC, and Z of the status register. All the flag bits C, Z, DC, OV and N are affected by the ADDLW instruction. Here we will discuss and focus only on flag C, DC, and Z there are related to unsigned number operations.

Not All Instructions Affect the Flags:-

Some instructions affect all the five flag bits C, DC, Z, OV and N. example ADDLW. Some instructions affect no flag bits at all. The move instructions does not affect flag bits . Except MOVF. Some instructions affect only the Z or N flag bits, or both. The logic instructions are in this category. Example ANDWL.

The status of the C, DC, and Z flags after the addition of 38H and 2FH in the instructions below:
MOVLW 38H ;move 38H to WREG
ADDLW 2FH ;add 2FH to WREG and store the result back to WREG
  38H    0011 1000
+2FH + 0010 1111
= 67H = 0110 0111
WREG = 67H
C = 0 there is no carry beyond the D7 bit
DC = 1 there is a carry from the D3 to the D4 bit
Z = 0 the WREG has a value other than 0 after the addition

 

 

 

 

 

 

 

 

 

The status of the C, DC, and Z flags after the addition of 9CH and 64H in the instructions below:
MOVLW 9CH ;move 9CH to WREG
ADDLW 64H ;add 64H to WREG and store the result back to WREG
  9CH    1001 1100
+64H + 0110 0100
= 100H = 0000 0000 
WREG = 100H
C = 1 there is a carry beyond the D7 bit
DC = 1 there is a carry from the D3 to the D4 bit
Z = 1 the WREG has a value 0 in it after the addition

 

 

 

 

 

 

 

 

 

The status of the C, DC, and Z flags after the addition of 88H and 93H in the instructions below:
MOVLW 88H ;move 88H to WREG
ADDLW 93H ;add 93H to WREG and store the result back to WREG
   88H    1000 1000
+ 93H + 1001 0011
= 11BH = 0001 1011 
WREG = 11BH
C = 1 there is a carry beyond the D7 bit
DC = 0 there is no carry from the D3 to the D4 bit
Z = 0 the WREG has a value  other than 0 in it after the addition

 

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